surface mount rf pin diodes technical data features diodes optimized for: low capacitance switching low current attenuator surface mount sot-23 package single and dual versions tape and reel options available low failure in time (fit) rate [1] lead-free option available note: 1. for more information see the surface mount pin reliability data sheet. hsmp-383x series package lead code identification (top view) description/applications the hsmp-383x series of general purpose pin diodes are designed for two classes of applications. the first is attenuators where current consumption is the most important design consideration. the second application for this series of diodes is in switches where low capacitance is the driving issue for the designer. the hsmp-386x series total capacitance (c t ) and total resistance (r t ) are typical specifications. for applications that require guaranteed perfor- mance, the general purpose hsmp-383x series is recom- mended. a spice model is not available for pin diodes as spice does not provide for a key pin diode characteristic, carrier lifetime. common cathode #4 common anode #3 series #2 single #0
2 absolute maximum ratings [1] t c = 25 c symbol parameter units absolute maximum i f forward current (1 ms pulse) amp 1 p t total device dissipation mw [2] 250 p iv peak inverse voltage same as v br t j junction temperature c 150 t stg storage temperature c -65 to 150 notes: 1. operation in excess of any one of these conditions may result in permanent damage to this device. 2. cw power dissipation at t lead = 25 c. derate to zero at maximum rated temperature. pin general purpose diodes, electrical specifications t c = 25 c minimum maximum maximum part package breakdown series total number marking lead voltage resistance capacitance hsmp- code [1] code configuration v br (v) r s ( ? )c t (pf) 3830 k0 0 single 200 1.5 0.3 3832 k2 2 series 3833 k3 3 common anode 3834 k4 4 common cathode test conditions v r = v br i f = 100 ma v r = 50 v measure f = 100 mhz f = 1 mhz i r 10 ma typical parameters at t c = 25 c part number series resistance carrier lifetime reverse recovery time total capacitance hsmp- r s ( ? ) (ns) t rr (ns) c t (pf) 383x 20 500 80 0.20 @ 50 v test conditions i f = 1 ma i f = 50 ma v r = 10 v f = 100 mhz i r = 250 ma i f = 20 ma 90% recovery note: 1. package marking code is white.
3 typical parameters at t c = 25 c (unless otherwise noted), single diode figure 2. rf capacitance vs. reverse bias. 0.15 0.30 0.25 0.20 0.35 02 6 41012 816 14 18 20 total capacitance (pf) reverse voltage (v) 1 ghz 100 mhz 1 mhz 120 110 100 90 80 70 60 50 40 1000 100 10 diode mounted as a series attenuator in a 50 ohm microstrip and tested at 123 mhz diode rf resistance ( ? ) figure 4. 2nd harmonic input intercept point vs. diode rf resistance for attenuators. input intercept point (dbm) 120 115 110 105 100 95 90 85 11030 i f ?forward bias current (ma) figure 5. 2nd harmonic input intercept point vs. forward bias current for switches. input intercept point (dbm) diode mounted as a series attenuator in a 50 ohm microstrip and tested at 123 mhz 100 10 1 0.1 0.01 0 0.2 0.4 0.6 0.8 1.0 1.2 i f ?forward current (ma) v f ?forward voltage (ma) figure 1. forward current vs. forward voltage. 125 c 25 c ?0 c 1000 100 10 10 20 30 t rr - reverse recovery time (ns) forward current (ma) figure 6. reverse recovery time vs. forward current for various reverse voltage. HSMP-3830 v r = 5v v r = 10v v r = 20v figure 3. rf resistance at 25 c vs. forward bias current. 1000 100 10 1 0.1 rf resistance (ohms) i f ?forward bias current (ma) 0.01 0.1 1 10 100
4 typical applications for multiple diode products figure 7. simple spdt switch, using only positive current. figure 8. high isolation spdt switch, dual bias. figure 9. switch using both positive and negative current. figure 10. very high isolation spdt switch, dual bias. rf common rf 1 bias 1 rf 2 bias 2 rf common bias bias rf 2 rf 1 rf common rf 1 rf 2 bias rf common rf 2 rf 1 bias
5 typical applications for multiple diode products (continued) input rf in/out figure 11. four diode attenuator. see an1048 for details. fixed bias voltage variable bias figure 12. high isolation spst switch (repeat cells as required). bias
6 package dimensions outline 23 (sot-23) pc board footprints sot-23 0.037 0.95 0.037 0.95 0.079 2.0 0.031 0.8 dimensions in inches mm 0.035 0.9 package characteristics lead material ...................................................................................... alloy 42 lead finish ............................................................................ tin-lead 85-15% maximum soldering temperature .............................. 260 c for 5 seconds minimum lead strength .......................................................... 2 pounds pull typical package inductance .................................................................. 2 nh typical package capacitance .............................. 0.08 pf (opposite leads) 3 1 2 side view top view end view dimensions are in millimeters ( inches ) 1.02 (0.040) 0.89 (0.035) 0.60 (0.024) 0.45 (0.018) 1.40 (0.055) 1.20 (0.047) 2.65 (0.104) 2.10 (0.083) 3.06 (0.120) 2.80 (0.110) 2.04 (0.080) 1.78 (0.070) 1.02 (0.041) 0.85 (0.033) 0.152 (0.006) 0.066 (0.003) 0.10 (0.004) 0.013 (0.0005) 0.69 (0.027) 0.45 (0.018) 0.54 (0.021) 0.37 (0.015) x x x package marking code (xx) date code (x) profile option descriptions -blk = bulk -tr1 = 3k pc. tape and reel, device orientation; see figure 13 -tr2 = 10k pc. tape and reel, device orientation; see figure 13 tape and reeling conforms to electronic industries rs-481, taping of surface mounted components for automated placement. for lead-free option, the part number will have the character "g" at the end, eg. -tr2g for a 10k pc lead-free reel. ordering information specify part number followed by option. for example: h smp - 383x - xxx bulk or tape and reel option part number surface mount pin diode
7 figure 13. options -tr1, -tr2 for sot-23 packages. tape dimensions and product orientation for outline sot-23 note: "ab" represents package marking code. "c" represents date code. end vie w 8 mm 4 mm top view abc abc abc abc device orientation for outlines sot-23 user feed direction cover tape carrier tape reel 9 max a 0 p p 0 d p 2 e f w d 1 ko 8 max b 0 13.5 max t1 description symbol size (mm) size (inches) length width depth pitch bottom hole diameter a 0 b 0 k 0 p d 1 3.15 0.10 2.77 0.10 1.22 0.10 4.00 0.10 1.00 + 0.05 0.124 0.004 0.109 0.004 0.048 0.004 0.157 0.004 0.039 0.002 cavity diameter pitch position d p 0 e 1.50 + 0.10 4.00 0.10 1.75 0.10 0.059 + 0.004 0.157 0.004 0.069 0.004 perforation width thickness w t1 8.00 + 0.30 ? 0.10 0.229 0.013 0.315 + 0.012 ? 0.004 0.009 0.0005 carrier tape cavity to perforation (width direction) cavity to perforation (length direction) f p 2 3.50 0.05 2.00 0.05 0.138 0.002 0.079 0.002 distance between centerline
www.agilent.com/semiconductors for product information and a complete list of distributors, please go to our web site. for technical assistance call: americas/canada: +1 (800) 235-0312 or (916) 788-6763 europe: +49 (0) 6441 92460 china: 10800 650 0017 hong kong: (65) 6756 2394 india, australia, new zealand: (65) 6755 1939 japan: (+81 3) 3335-8152(domestic/international), or 0120-61-1280(domestic only) korea: (65) 6755 1989 singapore, malaysia, vietnam, thailand, philippines, indonesia: (65) 6755 2044 taiwan: (65) 6755 1843 data subject to change. copyright ? 2004 agilent technologies, inc. obsoletes 5968-7688e ma rch 24 , 2004 5989-0484en
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